Staff Digital Design Engineer

Job Summary

Seeking a digital design engineer with experience and interest in developing complex mixed-signal ICs for frequency control, clock generation, network synchronization, and other timing applications. Candidate will be involved in all aspects of the design process from system conceptualization to mass production. The candidate will participate in digital system architecture, block- and system-level RTL design/coding, algorithm development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and full-chip mixed-signal verification.

Responsibilities

Responsibilities:

• Digital design specification, design, analysis, and HDL (Verilog/System Verilog) coding
• Detailed documentation, test vector development, lab test and evaluation, and other activities as required for the achievement of high-volume production.
• Behavioral modeling of analog and mixed-signal circuits
• Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc.
• Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RTL, firmware, and behavioral models. Test bench development
• Validation of silicon functionality, behavior, and performance

Qualifications

• B.S. or M.S. in Electrical (and/or Computer) Engineering.  For candidates with an M.S., a minimum of 3 years of design experience; otherwise, a minimum of 5 years of relevant design experience for candidates with a B.S.
• Strong motivation to contribute to all facets of chip design from conceptualization to release to mass production.
• Working knowledge of and experience in digital IC circuit design and simulation in an HDL synthesis environment
• Working knowledge of digital verification and testing techniques
• Strong verbal and written communication and presentation skills, positive attitude, and willingness to work on a team.
• Working knowledge of UNIX operating systems and Windows PCs.

Additional skills (one or more of these are highly desirable):

Experience with digital design at geometries ranging from 130-22 nm
Experience with digital IO interfaces such at I2C, SPI, etc.
Competence in high-level languages (e.g. Matlab, C), scripting languages (e.g. Tcl, Perl, Python, SKILL), and version control systems (e.g. SVN, SOS)
Working knowledge of System Verilog and/or UVM
Experience leading a team of digital designers, either formally or informally
Experience with embedded processor design and firmware/software development, especially for 8051 or ARM cores
Competence in exploring digital and firmware system/architecture trade-offs such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP
Experience with memory generators and MBIST
Understanding and experience in automatic test-pattern generation, ATPG.
Low power design and implementation techniques

#LI-DD1