Staff Electrical Engineer

Staff Digital IC Design Engineer

Seeking an experienced Digital IC design engineer for architecting and developing complex mixed signal ICs for Power, Isolation and Infrastructure applications. This person will work in a design group at the forefront of “Powering” the A.I., EV and Energy revolution, working to develop technologies that will revolutionize various end markets by enabling new levels of power efficiency. 

Responsibilities

• Derive requirements and architecture for Digital sub system from product specification and requirements.
• Interface with analog design teams to understand the interface requirements between analog and digital domains.
• Work with the team members to fine-tune the overall design leading to efficient implementation and verification cycles.
• Acts as a technical chip lead, manage chip and block schedule as needed to ensure on time tape out.
• Develops innovative new designs for patenting or protecting as trade secrets.
• Participates and contributes to product definition.
• Creates good documentation and reports on design results through design reviews.
• Attends design reviews to provide input and learn from other designers’ experiences.
• Research design techniques through technical publications and seminars

Educational Background 

• BTech and 8+ years’ experience
• MTech and 6+ years’ experience
• PhD and 3+ years’ experience

Minimum Requirements

• Strong motivation to contribute to all facets of chip design from conceptualization to release to production
• Working knowledge of digital IC circuit design in an HDL synthesis environment
• Ability to develop RTL code and understand how RTL will map to gate-level structures
• Knowledge of scripting/language (Python, PERL, shell, TCL)
• Deep understanding of the digital design flow from architecture through RTL design, verification, synthesis, timing closure, P&R preparation and scan insertion
• Experience with Verilog, System Verilog and functional coverage
• Developed and executed comprehensive product and block level verification plans
• Knowledge of mixed signal concepts and digital-analog interfaces
• Experience in AMS modelling and verification
• Good verbal and written communication skills, positive attitude, desire to learn, and willingness to work on a team

Additional skills (one or more of these are highly desirable)

• Competence in high-level languages (e.g., MATLAB, C), scripting languages (e.g., Tcl, Perl, Python, SKILL), and version control systems (e.g., SVN, SOS)
• Working knowledge of System Verilog and/or UVM
• Experience with digital design verification, and full-chip mixed-signal verification.
• Experience with digital IO interfaces such at SPI, I2C etc.
• Competence in exploring digital and system/architecture trade-offs such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP.
• Experience with both digital front end and back-end tools
• Familiarity with DSP techniques and algorithms