Director, Engineering (Nashua or Austin)

Job Description

How the Timing Design Team Works
Skyworks’ Timing Division is focused on creating a new generation of clock, oscillator and network synchronization products. Our team designs system-on-chip hardware and software for precision timing chips. These complex mixed-signal ICs require a multi-disciplined IC design team working in close collaboration to achieve the lowest power and most cost-effective solutions.  The Timing Design team is comprised of the brightest and most innovative engineers in the semiconductor industry, spanning multiple disciplines: Analog, RF, Digital and Software.  Design Engineering Directors / Technical Directors work closely with managers, analog and digital design engineers, layout designers and software engineers throughout all phases of the chip design process: architecture, design and implementation, verification, and validation of silicon. Products are often mixed-signal and may include analog and RF components. Many of our products also include one or more CPUs, custom DSP hardware and Arithmetic/DSP cores. 

The Role

Location:  Nashua, NH or Austin, TX
We are seeking a technical leader and experienced Design Engineering Director / Technical Director for our Timing Products division. This team is responsible for creating the next generation of complex analog mixed-signal ICs geared towards telecommunications, networking, and other infrastructure applications. The position requires a strong analog circuit design background including a proven history of innovative product and IP definition and design.  
You will be a key contributor and provide direction to product roadmaps, definition, technology selection, circuit design, and verification. You will serve as a hands-on group Director / Technical Director of a mixed-signal design team, providing technical leadership in defining and implementing the overall system architecture, guiding design of transistor-level analog circuit blocks, simulation of sub-system performance, realization of the entire IC, supervising physical layout, verification of circuit and chip-level operation and performance, and assisting with tape-out related activities. Responsibilities will also include driving documentation, silicon evaluation and debugging, production test development support, customer support, and other activities as required for the achievement of high-volume production.
 

Responsibilities

•    Management and Technical leadership of the Timing Design group
•    Works with VP of Engineering, managers in the design and marketing groups to plan roadmaps and next generation products, provides forecasts and expenditure
•    Guides project management for products: create design schedules, chip size estimates, and resource requirements
•    Reviews weekly project updates and progress
•    Provides guidance and oversees architecture, design and verification, systems, algorithms, etc. to meet product requirements
•    Develops innovative new designs for patenting or protecting as trade secret
•    Manages and mentors other design engineers in the group
•    Participates and contributes to product definition
•    Balances innovation with execution: to ensure that the projects are delivered in a timely manner
•    Demonstrates good judgment in solving a broad range of issues, based on an advanced understanding of industry practices and company policies and procedures
•    Oversees and guides the work of layout designers
•    Responsible for interviewing and hiring new full-time engineers as well as summer interns for the group
•    Reports on design results through design reviews, in accordance with company quality requirements and resolves action items generated as a result of these reviews
•    Attends design reviews to provide input and learn from other designers’ experiences
•    Researches design techniques through technical publications and seminars

Qualifications

Minimum Requirements:
•    Previous management of an IC Design group highly desirable 
•    Previous direct design experience in high-performance, high-speed circuits in deep sub-micron processes
•    Advanced knowledge of MOS transistors and analog circuit design
•    Knowledge of complex AC/DC analysis (poles, zeros, compensation), loop dynamics and feedback systems
•    Advanced knowledge of device physics and CMOS fabrication processes
•    Previous design experience with high performance PLL circuits
•    Experience in noise (thermal and flicker noise) and jitter analysis
•    Strong background in analog signal chain solutions with experience in voltage/current references, thermal management and system integration
•    Advanced knowledge in signals, systems and transforms
•    Advanced understanding of layout tradeoffs for performance and size

Other skills in your toolbox:
•    Advanced MOS Device modeling skills (noise, excess thermal noise)
•    Designing sigma-delta modulators, ADCs, DACs, and/or time-to-digital converters
•    Exceptional laboratory measurement skills (analog, RF-as req.)
•    System knowledge (e.g., PLLs) and advanced design skills in system modeling
•    Strong knowledge of circuit simulation tools, layout verification tools, Matlab, and UNIXFamiliarity with quality systems documentation and procedures

Education Requirements:
M.S. or PhD and 12+ years of developing high performance analog solutions in CMOS technologies

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