Power Amplifier/RFIC Design Engineer

Position Summary

Skyworks Newbury Park design center is seeking a Power Amplifier/RF IC Design Engineer. If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. Our work culture values diversity, social responsibility, open communication, mutual trust and respect. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.

Responsibilities

Power Amplifier/RF IC Design Engineer is responsible for design and development of RFICs for mobile handset applications, including Class A, AB/E/F, Doherty, and other high efficiency advanced topologies. Designs will be Multi-Chip Modules, implemented in GaAs (HBT/pHEMT) as well as various IPD processes. Individual should have experience in RF & 3D EM modeling and simulation of complete module, tuning and bench evaluation of PA parameters such as gain, linearity, PAE, P3dB, input/output matching and stability. The candidate will work with a group of analog/RF IC design experts in development of cellular-band ICs that transmit, receive, and/or switch signal to or from antennas. The candidate will interface with design management and module design teams to create the detailed specification, report design progress, and to collect, track, and resolve any performance and circuit design issues.

Required Experience and Skills

• BS Degree and 5 years’ experience required, MSEE or Ph.D. preferred.
• Familiar with amplifier modes of operation: Class A, AB, C, E, F and load modulation techniques such as Doherty PA design.
• Familiar with DPD, and memory effects, and how those impact PA design.
• RFIC design experience using GaAs HBT and or pHEMT of PAs and bias networks, passive components including couplers and matching networks is a must.
• Proficient in HFSS and Keysight ADS, and experience with design simulation tools or equivalent - APD, Cadence
• Good knowledge and understanding of laminate, wire bonding, SMT components.
• Responsible for managing design tradeoffs on performance, risk, yield, testability and cost.
• Layout floorplan to optimize performance, layout supervision, post layout simulations.
• Familiar with implementation of on chip ESD protection strategies for HBM, and CDM.
• Strong Lab experience to perform IC / MCM characterization and debugging.
• Familiar with the use of load pull techniques to evaluate device and PA performance.
• Team player with a strong sense of urgency to meet product requirements schedule.
• Excellent Oral and written communication skills.

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