Description

About Skyworks Solutions Inc

Connecting Everyone and Everything, All the Time

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking.  Our work culture values diversity, social responsibility, open communication, mutual trust and respect. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.

Responsibilities

• Custom IC Mask/Layout design for 40/22nm (SOI) analog, RF, and mixed/signal circuits.
• Lead end‑to‑end layout development for analog, mixed‑signal, or digital blocks from concept to tape‑out.
• Provide technical guidance on floorplanning, placement, routing, shielding, matching, and layout optimization techniques.
• Work closely with the junior engineers and contractors for scheduling tasks, guiding them in the floor planning of blocks, implementation, reviews, and closure.
• Work closely with design engineers and CAD support by maintaining effective communication.
• Review and approve layouts for quality, DRC/LVS/PEX closure, EM/IR compliance, ESD robustness, and manufacturability.
• Develop methods to improve efficiency in layout methodology and drive best practices for a quality, reliable and timely outputs.

Required Experience and Skills

• Bachelor / Master’s Degree with minimal 10-12 years of relevant experience
• Strong proficiency in using Cadence Virtuoso XL for layout and Calibre for DRC/LVS/PEX.
• In‑depth understanding of CMOS IC mask design and verification, with solid knowledge of electromigration, IR drop, coupling capacitance, device and signal matching, and Layout‑Dependent Effects (LDE).
• Self‑driven professional with effective planning and reporting capabilities.

Desired Experience and Skills

• Bachelor / Master’s Degree with minimal 10-12 years of relevant experience
• Strong proficiency in using Cadence Virtuoso XL for layout and Calibre for DRC/LVS/PEX.
• In‑depth understanding of CMOS IC mask design and verification, with solid knowledge of electromigration, IR drop, coupling capacitance, device and signal matching, and Layout‑Dependent Effects (LDE).
• Self‑driven professional with effective planning and reporting capabilities.