Description

Skyworks Solutions is seeking a Sr. Principal–level contractor to support ESD development for advanced CMOS, BiCMOS, and SOI process technologies used in Advanced Wireless, Secure Communications, Infrastructure, and Automotive applications. This role will collaborate closely with internal technology experts and external foundries to deliver robust ESD solutions for highly integrated analog/mixed-signal and RF/mmWave ICs.

If you are looking for a challenging and exciting project, look no further. Skyworks is an innovator in high‑performance analog semiconductors, powering the wireless networking revolution. As a leader in this space, we are connecting everything and everyone, all the time. We make next‑generation, connected‑everything technologies possible.

At Skyworks, you will find a fast‑paced environment with a strong emphasis on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a culture that encourages creativity and out‑of‑the‑box thinking. Our workplace values diversity, social responsibility, open communication, mutual trust, and respect. We are excited about the opportunity to work with you and are glad you want to join a team of talented individuals who are shaping the future together.

Responsibilities

• Design, validate, and qualify internal and external ESD devices and IP, including ESD diodes, power clamps, and high‑voltage SCR devices for ESD and EOS protection as part of new technology introductions.
• Collaborate closely with design teams to develop and review IO and power pad rings for robust ESD protection.
• Serve as a technical interface between internal design teams, design‑enablement teams, and external foundries on topics such as device ESD characteristics, reliability, and DFM (Design for Manufacturing).
• Perform ESD co‑design and simulation for custom pad structures used in sensitive RF/mmWave applications.
• Participate in failure analysis (FA) for device field returns or any pin/pad that fails ESD qualification.
• Work with the internal PDK team to release ESD IP and libraries.
• Conduct electrical, ESD, and reliability characterization of devices as needed.

Required Experience and Skills

The candidate should hold at least an MS degree (a Ph.D. is preferred) and have a minimum of 10 years of industry experience in technology deployment and modeling of advanced semiconductor technologies. Familiarity with advanced modeling methodologies for leading‑edge CMOS technologies is also required.

Critical skill set includes:

• Deep expertise in device physics and advanced CMOS, BiCMOS, and SOI technologies
• Extensive knowledge of ESD device design, characterization, and ESD protection methodologies
• Experience in device‑level reliability characterization and modeling
• Strong proficiency with EDA tools for analog/mixed‑signal design, simulation, and modeling
• Hands‑on experience with IC‑ and module‑level ESD and CMOS/BiCMOS latch‑up (LUP) failure analysis and debugging
• Highly motivated, strong team orientation, a sense of ownership, and openness in communication

Desired Experience and Skills

Knowledge in analog/mixed-signal/RF IC design for RF front-end module (RF FEM)